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Publications

Our research contributions are regularly published in top-tier conferences in the field of computer science and engineering. Below is a select list of our recent publications, with the most recent work listed first.

2025

  1. VCDiag: Classifying Erroneous Waveforms for Failure Triage Acceleration

    M Luu, S Jasper, K Le, E Pan, M Quinn, A Tyagi, J Hu

    ACM/IEEE International Symposium on Machine Learning for CAD, September 2025

    arXiv preprint

  2. BugGen: A Self-Correcting Multi-Agent LLM Pipeline for Realistic RTL Bug Synthesis

    S Jasper, M Luu, E Pan, A Tyagi, M Quinn, J Hu, DK Houngninou

    ACM/IEEE International Symposium on Machine Learning for CAD, September

    arXiv preprint

  3. Improving Last-Mile Coverage in Functional Verification

    C Liu, P Parlapalli, DK Houngninou, M Quinn, A Tyagi, J Hu

    ACM/IEEE International Symposium on Machine Learning for CAD, September 2025

    ACM Digital Library

2024

  1. MinBLoG: Minimization of Boolean Logic Functions using Graph Attention Network

    P. Sengupta, A Tyagi, J Hu, VK Rajan, H Mostafa, S Majumdar

    ACM/IEEE International Symposium on Machine Learning for CAD, September 2024

    ACM Digital Library

2023

  1. HyPFuzz: Formal-Assisted Processor Fuzzing

    C. Chen, R. Kande, F. Andersen, A. Tyagi, A. Sadeghi, J. Rajendran

    32nd USENIX Security Symposium, August 2023

    USENIX

  2. Quick Identification of Timing Critical Components in RTL Designs

    P. Sengupta, A. Tyagi, Y. Chen, J. Hu

    IEEE/ACM MLCAD Workshop, September 2023

    IEEE Xplore

2022

  1. Transaction level stimulus optimization in functional verification using machine learning predictors

    S Gogri, A Tyagi, M Quinn, J Hu

    23rd International Symposium on Quality Electronic Design (ISQED), September 2022

    IEEE Xplore

  2. TheHuzz: Instruction Fuzzing of Processors using Golden Reference Models for finding Software-Exploitable Vulnerabilities

    R. Kande, A. Crump, G. Persyn, P. Jauernig, A. Tyagi, A. Sadeghi, J.V. Rajendran

    31st USENIX Security Symposium, August 2022

    USENIX

  3. How Good Is Your Verilog RTL Code? A Quick Answer from Machine Learning

    P. Sengupta, A. Tyagi, Y. Chen, J. Hu

    International Conference on Computer Aided Design, November 2022

    ACM Digital Library

2020

  1. Machine Learning-Guided Stimulus Generation for Functional Verification

    S. Gogri, J. Ju, A. Tyagi, et al

    DVCON’20, San Jose, CA, March 2020

    DVCon proceedings